Аннотация.

Показана возможность разрядного представления математических функций для их быстрого вычисления на основе различных подходов. Для быстрого вычисления функций предложены разрядно-параллельные схемы, ориентированные на применение многовходовых сумматоров, приведена архитектура специализированного геометрического процессорного элемента. Даны оценки вычислительной сложности. Рассмотренная разрядная технология может быть применена в бортовых вычислителях, использующих технику FPGA для обработки сигналов и выработки управлений.

Ключевые слова:

математические функции, разрядные схемы, параллельные вычисления, алгоритмы CORDIC, многовходовый сумматор, специализированный процессорный элемент.

Стр. 26-44.

V.M. Khachumov

"The calculation of mathematical functions based on bit-parallel schemes"

Тhe possibility of bit representations of mathematical functions for fast calculations on the basis of different approaches is shown. For a fast calculation functions offered bit- parallel computing scheme, focused on the use of multi-input adders, shows the architecture of the specialized geometric processing element. Estimates of the computational complexity. Considered bit technology can be applied in the onboard computer, using FPGA technology for signal processing and control production.

Keywords:

mathematical functions, bit scheme, parallel computing, the CORDIC algorithms, multi-input adder, a specialized processing element.

Полная версия статьи в формате pdf. 

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